1. Field of the Invention
The present invention relates to phase-change nonvolatile memories and manufacturing methods therefor.
The present application claims priority on Japanese Patent Application No. 2007-304332, the content of which is incorporated herein by reference.
2. Description of Related Art
As next-generation semiconductor memories, various types of semiconductor memories have been developed to provide large scales of storages with various electronic devices. For example, it is possible to name ferromagnetic memory (e.g. FeRAM), magnetoresistive memory (e.g. MRAM), resistive memory (e.g. ReRAM), and phase-change memory (e.g. PRAM).
The phase-change memory (PRAM) is the semiconductor memory that stores data using phase-change materials. A current is forced to flow into a heater plug, which is formed below a phase-change recording layer, so as to cause heat at a contact interface between them, wherein phase-change materials forming the phase-change recording layer are changed from a crystallized state to a non-crystallized state or from a non-crystallized state to a crystallized state. Since phase-change materials have different resistances between the crystallized state and the non-crystallized state, the phase-change memory can store data therein.
A current value which is necessary to cause a phase change from the crystallized state to the non-crystallized state is referred to as “Ireset”. As Ireset becomes smaller, it is possible to reduce spot diameters causing the phase change in the phase-change recording layer, whereby it is possible to achieve large scale storage. For the purpose of reducing current consumption, it is preferable that Ireset becomes smaller.
Various examples of phase-change memories and nonvolatile memories are disclosed in various documents such as    Patent Documents 1 and 2.    Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-73779    Patent Document 2: Japanese Unexamined Patent Application Publication No. 2006-165560    Patent Document 1 teaches an example of the phase-change nonvolatile memory (PRAM).
FIG. 9 shows the constitution of the phase-change nonvolatile memory (PRAM) in which a heater plug 102 is embedded in a hole 119 (having a contact diameter φ) running through an interlayer insulating layer 118, wherein a phase-change recording layer 110 formed on the interlayer insulating layer 118 is heated at a contact interface 119a (which is positioned in contact with the hole 119 having the contact diameter φ), thus causing a phase change on a prescribed part of the phase-change recording layer 110.
Since the current value Ireset is proportional to a contact area, i.e. π×(φ/2)2, between the heater plug 102 and the phase-change recording layer 110, it is necessary to reduce the contact area in order to reduce Ireset; that is, it is necessary to reduce the contact diameter φ.
The contact diameter φ of the hole 119 is limited by the process limit due to the formation of the hole 119 by way of the lithography, whereby the hole 119 cannot be reduced in size beyond the process limit. The process limit defines the contact area as well as the current value Ireset. Due to the present process limit, the contact diameter φ may be reduced into the range from approximately 100 mm to 160 nm.
Patent Document 2 teaches another example of the phase-change nonvolatile memory (PRAM) in which the contact diameter φ is further reduced.
FIG. 10 shows the constitution of the phase-change non-volatile memory, in which a side wall 125 is formed in an upper portion 103c of the hole 119. An interior surface 125c of the side wall 125 has an inclination 125c so that a distal end 125a of the side wall 125 becomes thinner than a base 125b of the side wall 125 in thickness. Using φ1 denoting the diameter at the base 125b of the side wall 125, φ denoting the diameter at the distal end 125a of the side wall 125, and φ2 denoting the original diameter of the hole 119, the upper portion 103c of the hole 119 is designed such that diameter φ1 at the base 125b of the hole 119 becomes the smallest; hence, φ1<φ<φ2. Since the diameter φ (corresponding to the contact diameter between the heater plug 102 and the phase-change recording layer 110) is smaller than the original diameter φ2, it is possible to reduce the current value Ireset to be smaller than the foregoing current value defined by the original diameter φ2.
Even when the side wall 125 is formed in the upper portion 103c of the hole 119, there still remains the process limit in reducing the contact diameter φ between the heater plug 102 and the phase-change recording layer 110. When the side wall 125 becomes thicker, a micro-loading effect may apparently appear so as to make it difficult to perform “etch back” in the formation of the side wall 125, which may deteriorate the productivity due to defectiveness. In the case of the hole 119 having the side wall 125, the present process limit may define the contact diameter φ to approximately 30 nm.
Since the foregoing phase-change nonvolatile memory (PRAM) still suffers from the process limit in reducing the contact diameter φ, the present inventor has recognized that it is difficult to reduce the current value Irest to a desired value.